PCI, or Peripheral Component Interconnect, has become established as the most common way of connecting internal peripherals to computers. Although a few proprietary mechanisms still exist, even some of the traditional die-hard manufacturers (such as Sun, which has based many of its products over the years on its own S-Bus interconnect architecture) have turned to PCI thanks to its ubiquity and the resulting low cost of peripherals.
There's a problem, though: PCI runs at 33MHz, which is far from speedy by today's standards. Although the PCI-X standard, a derivative of PCI with a bus speed of 133MHz, was devised to address this issue, it's only really been useful as an interim fix, and something new and speedier is needed. PCI Express is being touted as the answer.
PCI Express' origins lie in a concept called 3GIO (3rd Generation I/O), which started as an Intel-supported programme but which has now been re-labelled PCI Express and given to the PCI-SIG (the PCI Special Interest Group). The idea is to make the standard as open as possible, since openness encourages vendors to adopt technologies.
PCI Express is, in fact, an adventurous concept, since it aims to solve in a single swipe all of the shortcomings of previous PCI implementations. The most important aspect, of course, is the speed of the interconnection.
Faster, faster...br>Where a PCI-X device with a 133MHz bus can handle approximately 1GByte/sec throughput, PCI-X in its top-end form will permit point-to-point communications of up to 16GByte/sec. The limitations of parallel bus technologies such as PCI (most notably the requirement for congestion handling under heavy loads) are eliminated by adopting a serial bus instead of PCI's traditional parallel bus. (Note for pedants: while it's true that the PCI-X spec is being extended to cater for 266MHz and 533MHz bus speeds, and perhaps even beyond, the resulting speed-up will still remain considerably less than that achieved with PCI Express. For reasons we'll discuss in the next section, the technology issues grow significantly when trying to speed up parallel bus systems).
Why serial? br>Since the dawn of time, computer science students have been taught that parallel communication is faster than serial - after all, if you have an eight-bit parallel bus, you can transmit eight bits at once, whereas with serial you can only send one bit at a time. The problem with parallel buses, though, is synchronisation. The electrical constraints of the physical hardware mean that there may be minor propagation time differences between the various channels in the bus. So the hardware builders have to compensate for these propagation discrepancies by building in delays (adding delay = slowing down the clock) between transmissions that allow the signals to "settle". In a parallel bus such as the ATA disk interface, these delays can be a number of nanoseconds which, as they say, is a long time in computing. Serial buses, on the other hand, send only one bit at once, and synchronisation is much less of an issue, allowing the designers to make the "settle" time much less - a fraction of a nanosecond in practice. This means that the clock can be cranked up much faster, with the result that although the serial bus is only sending one bit at once, it's waiting much less between bits and so the overall throughput is greater. It's happening all over the technology range - USB is a serial bus, for instance, and the Serial-ATA storage interconnect protocol uses precisely the same logic to ramp up throughput.
The other stuffbr>We've said that PCI Express addresses more than just the speed issue, though, so what else does it do? Perhaps the most interesting fact is that the physical connection layer is being abstracted from the rest of the specification - that is, the medium over which the bits are travelling could be copper, but it could also be fibre. Why would you bother with this inside a computer? Well, you probably wouldn't but the point is that PCI Express is envisaged as both an internal connection mechanism and, probably later on, a means of connecting your external peripherals too.
More relevant to the present day is the inclusion of hot-swap capability as part of the standard, along with built-in power management features. The intercommunication protocols will also include Quality of Service features, allowing throughput guarantees to be given to high-traffic, high-criticality devices, such as storage units or graphics cards.
What it will replacebr>The idea of PCI Express is that there will be a compatibility bridge with existing PCI technologies but that it will work alongside, though not necessarily replace, technologies that we use today, such as SCSI, FireWire, USB and Ethernet. Although hard to believe in some cases (why would a component interconnect technology replace a system interconnect technology, such as Ethernet) it wouldn't come as a great shock if, at some point in the future, technologies started to converge. For instance, although Serial-ATA is software-compatible with traditional parallel ATA, it wouldn't be a huge surprise to see the two converge and a compatibility layer get slapped on top of PCI Express.
The one admission that the PCI Express people do make, though, is that the AGP graphics card standard will fall by the wayside, since even in its first (slowest) form PCI Express is significantly faster than today's AGP standards.
Timescalebr>Finally, let's answer the obvious question: when will we start to see PCI Express devices on the market? Manufacturers, such as Intel, have already produced and demonstrated their first implementations and a number of vendors (notably Intel and Dell) believe that we'll start to see mainstream PCI Express-based systems later in 2004.