The conundrum chip designers perpetually face is achieving greater processing speeds, but at the same time reducing a chips power consumption needs. The two goals are at loggerheads with each other. If you want to go faster, you are going to generate more heat.
But last year IBM believed it solved this thorny problem by integrating strained silicon and silicon-on-insulator (SOI) technologies in the same manufacturing process. One more important ingredient they added to the process was Norman Rohrer.
Rohrer, one of IBMs key solvers of difficult problems, oversaw the development of the PowerPC 970FX processor and contributed heavily to the chips power saving circuit design. A senior technical staff member in IBM's systems and technology group, he holds 17 patents in a variety of IBM chip technologies.
The PowerPC 970FX is the first chip to fuse SOI, copper wiring, and strained silicon technologies, which has resulted in greater performance improvements compared to the Power 4. But the other breakthrough made with this chip is that it saves power while still being able to operate at equal or higher clock speeds.
The 970FX is a derivative of IBM's Power 4 chip, which is widely used in Big Blues line of Unix-based servers. The Power 4 itself made a technical breakthrough by packing two processing cores onto a single dye resulting in significantly higher processing power.
Rohrer is pleased with the solution.
"The biggest thing we have been able to achieve is to establish a broader power range," Rohrer said. "If you look at the 130nm chip, its fairly high powered and relegated to one spot. With the 90nm version we were able to run at the same [gigahertz] speeds and even higher but with significantly less power."
The first system delivered to market using the chip is Apple's Xserve G5, a single processor, rack-mount server that has received good reviews and helped bolster the company's low-end server sales.
Central to the chips ability to operate on significantly reduced power is the Power Tuning technique that Rohrer developed and patented. The technique is enabled through advanced system-wide tuning and controlling of processor frequency and voltage.
"We added some additional power-control features within the chip, called Power Tuning. We wanted the end product to have more capability to scale across voltages and frequency," Rohrer explains.
Rohrer focused on the endpoint - the users. "We wanted to optimise more of a total system answer for customers," he said.