Intel is aiming to blast away the obstacle slowing iSCSI SAN adoption. It will add data loading to its server chipsets in parallel to servers doing the TCP/IP stack processing. Its I/O AT (I/O Acceleration Technology) will, it claims, do away with the need to put TCP/IP processing into storage Ethernet network interface cards (NICs).
Traditional SANs use Fibre Channel storage area networks which have dedicated and expensive switches, cabling and server HBAs (Host Bus Adapters). Common or garden Ethernet is used as the network link for iSCSI SANs in which servers send SCSI commands to disk arrays across Ethernet. The catch is that the SCSI commands and returned data have to be encapsulated in TCP/IP packets. This additional TCP/IP processing load slows down the servers.
Adaptec and other suppliers have offloaded the TCP/IP processing by adding dedicated TOEs (TCP/IP Offload Engines) to their Ethernet cards used for storage networks. But these are more expensive than ordinary Ethernet NICs and so the price advantage of iSCSI SANs compared to Fibre Channel SANs is reduced.
Intel sees an opportunity here and aims to add data set copying to its server chipsets and network controllers via I/O AT. This will be done in parallel to the TCP/IP processing taking place in the server CPU thus speeding up the overall data transmission time. In effect iSCSI commands and data moving are done simultaneously with Intel network controller memory being directly accessed.
Stephen Chenoweth, marketing manager for Intel's newly-formed Digital Enterprise Group, claims it could move data to server applications thirty percent faster than iSCSI SANs not using this technique, or, presumably, TOE cards. An Intel article discusses the background to IO/AT.
Intel will spill its storage I/O acceleration technology beans at its developer forum in San Francisco next month. The technology would appear in products in 2006 and represents a wider strategic move by the company. Note that this technology would only work if it is an all-Intel environment or platform from server chip out to the Ethernet storage network.
No more details are available. You might think it would be possible, processor transistor budgets being so high these days and TCP/IP being ubiquitous, to put a TCP/IP engine into the processor chip directly. It would still offload the main processor(s).