Startup SiNett has released a unified access chip for integrated wireless and wired networks that it claims can improve performance and lower cost for businesses.
However it is likely to encounter competition from vendors trying to achieve the same goal, but with different methods, analysts say.
SiNett's design integrates wireless and wired packet processing, switching, security, mobility and traffic management on a single chip, and can be installed in edge switches, WLAN switches and WLAN appliances, according to Shiri Kadambi, SiNett's CEO.
Systems built using SiNett's chips are likely to be a quarter to a third cheaper that existing setups, Kadambi said.
Current network equipment, which addresses unified access requirements, uses a "ping-pong architecture" that processes the packet in a number of hops across a number of devices, including a switch, a security processor and a network processor, each with their own buffer, according to Kadambi. "You end up doing multiple copies and references to buffers and tables at each stage, which increases latency, and brings down performance," he added.
SiNett has two versions of its OneEdge unified access chip. The SN5024 edge-switch processor is designed for integrated wired and wireless edge switches, while the SN6004 controller is optimised for use in WLAN appliances that put wireless access management at the data centre level.
It is only incrementally harder for SiNett to support both the core and the edge of the network, and as a startup they cannot afford to pass up either opportunity, according to Joseph Byrne, semiconductor analyst at Gartner.
A one-chip solution removes the need for a separate crypto accelerator, and the cost savings may be as high as 50 percent depending on the configuration, Byrne said. A single chip, purpose-built solution also keeps more traffic in the fast, hard-wired path, and the performance benefits could start to become noticeable if the switch is heavily loaded and the wireless links are carrying latency-sensitive traffic such as voice, Byrne added.
The SiNett chip architecture uses a hardware pipeline to do wired and wireless packet processing, in-line decryption and network processing functions in one pass, according to Kadambi. "We have stitched in the decryption and parsing for example in the ingress engine, and reduced the number of stores of the packet to one," he said. The result is a performance of over 8Gbit/s full duplex, in contrast to 500Mbit/s to about 2Gbit/s in unified access implementations that use the multiple hop, ping-pong architecture, according to Kadambi.
SiNett is also likely to compete against other merchant switch ASSP suppliers such as Broadcom and Marvell. While both companies currently trail SiNett, they are capable technologically and have incumbent market status, according to Byrne.
A prototype of the SiNett chip has already been shipped to OEM customers, and the first chips, fabricated by Taiwan Semiconductor on a 0.13 micron process, will be shipping in the second quarter of this year.
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