Intel has made a number of power-saving enhancements to its Atom chips that will be included in its upcoming Moorestown platform for smartphones.
The platform draws up to half the power in active mode and up to 50 times less power in idle mode compared to its predecessors, said Rajesh Patel, lead architect for the Lincroft system-on-chip at Intel during a presentation at the Hot Chips conference in Stanford.
Intel currently ships the Menlow platform, which is targeted at handheld computers called mobile Internet devices (MIDs).
Moorestown is a chip platform that Intel is targeting at smartphones and MIDs. The platform includes a more power-efficient version of the Atom processor, codenamed Lincroft, which is paired with a chipset called Langwell. Lincroft is described by Intel as a system-on-chip (SoC), which includes a 3D graphics accelerator, integrated memory controller and other components on a single chip.
Lincroft includes new power management features to bring energy efficiency when devices like smartphones are idle, Patel said. For example, the processor can completely shut off when a device is in idle mode, Patel said. The company also reduces clock speed to predefined thresholds depending on device usage.
The SoC has also been partitioned into multiple power ‘islands,' where components can be individually shut off when not in use. The fine-grained power management is enabled through hardware and software enhancements, Patel said.
The power-gating technology can shut off almost all components when a device is in idle mode, with the only active parts being the components necessary to activate the processor.
"We went after idle power because it is the most common usage," Patel said. Devices like smartphones remain in idle mode longer during average daily usage, he said.
Patel did not disclose how long it takes for the processor to recover from sleep to active mode.
The chip will be made using the 45-nanometer process, which brings more energy efficiency compared to its predecessor. The Moorestown platform chip package is close to half the size of the Menlow platform.