IBM has developed a technique for building two different types of silicon transistors atop a single wafer that is expected to boost the performance of communications devices.
The overwhelming majority of transistors built since the mid-1980s are known as CMOS (complementary metal-oxide semiconductor) transistors. But in the earlier part of the history of computing, most chips used what are known as bipolar transistors, said Ghavam Shahidi, director of silicon science for IBM Research.
Bipolar transistors are very good at amplifying low noises, or picking up quiet signals in loud environments, Shahidi said. For that reason, they are still used in some communications chips, although in small quantities due to their rapid power consumption and high manufacturing cost, he said.
CMOS transistors are less expensive to build, and handle the majority of the data processing tasks on communications chips. In order to improve the performance of communications devices, IBM sought to discover a way to include bipolar transistors on the company's thin SOI (silicon on insulator) wafers, Shahidi said.
IBM currently uses SOI technology in its chips, and Advanced Micro Devices Inc. has also implemented the technology on its new Opteron and Athlon 64 processors.
SOI wafers have a thin layer of oxide applied to them as an insulating agent against power leakage and help improve the performance of CMOS transistors. But bipolar transistors have historically required a thicker base than is needed by CMOS transistors, making them unsuitable for chips built from SOI wafers, Shahidi said.
IBM has now built bipolar transistors atop its thin SOI wafers in its development labs, and hopes to bring the technology to end user products within five years, Shahidi said.
Possible applications for this technology include smaller GPS (Global Positioning System) devices or cell phones with enhanced video streaming, IBM said.
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