Intel has made several changes to its processor road-map, delaying its first dual-core Itanium 2 and replacing a future multi-core Xeon with a new design.
Montecito, the dual-core version of the Itanium 2 processor, will not be available in large volumes until the middle of next year, instead of the early part of next year as originally planned, said an Intel spokesman.
While preliminary shipments of the processor are already under way, Intel decided to make a few changes to the chip in order to reach the company's standard for "production level quality", the spokesman said, declining to specify the nature of the changes.
Montecito will no longer ship with Foxton, a sophisticated power-management technology, and the speed of its front-side bus connection to memory will run at 533MHz instead of the 667MHz speed originally scheduled for the design.
Intel also has killed Whitefield, a multi-core Xeon processor for servers with four or more processors. It is being replaced by a new processor called Tigerton that will appear in 2007, the same timeframe in which Whitefield was expected to arrive.
Tigerton processors will use a high-speed interconnect technology that will allow each processor to connect directly to the server's chipset. Current Xeon processors in multi-processor servers must share a front-side bus connection to the chipset in order to access data from system memory or I/O - a bottleneck that industry analysts have blamed for the current performance gap between Intel's server chips and AMD's Opteron processors.
Intel's next-generation architecture, announced by CEO Paul Otellini in August, will be used as the blueprint for Tigerton. It is based on low-power design principles used to build Intel's Pentium M processor for notebooks.